1. Field of the Invention
The present invention relates to a semiconductor device in which injection of electric charge from an electric charge source is restricted to provide highly reliable insulating performance.
2. Description of the Background Art
There is a growing demand today for a power module suited for reliably controlling a large current flowing in such electric apparatuses as motors and heaters. One requirement in the design of this kind of power module is to structure the same to provide a high withstand voltage retaining capability so that a leak current which may flow other than through an ordinary current path will not flow between a collector (positive electrode) and an emitter (negative electrode) to which an extremely high voltage is applied, for instance. A structure having such a high withstand voltage retaining capability is obtained by use of a power semiconductor chip like an insulated-gate bipolar transistor (IGBT) and insulative sealing resin for packaging the power semiconductor chip, for example. One conventionally known example of a structure having a high withstand voltage retaining capability is a guard ring structure which typically includes a plurality of guard rings separated from one another running along an outer peripheral region of an upper surface of a semiconductor chip and a plurality of capacitive elements made of an insulating material like sealing resin filled between the adjacent guard rings. The guard ring structure thus formed reduces an electric field produced along the surface of the semiconductor chip and suppresses the leak current. The guard ring structure formed in the outer peripheral region of the semiconductor chip serves to provide an increased dielectric withstand voltage in surface directions between an emitter located in a central region of the upper surface of the semiconductor chip and a collector located below the emitter.
On the other hand, Japanese Patent Application Publication No. 1995-30015 proposes a structure for providing high breakdown voltage characteristics. Intended to avoid a leak current under high-temperature and high-humidity conditions, this structure is to cover side surfaces and at least an outer peripheral region of an upper surface of each semiconductor chip with a first insulating material having a modulus of elasticity of 106 dyn/cm2 or more and fill a second insulating material having a modulus of elasticity of 106 dyn/cm2 or less into a space in an insulative package. Even if water intrudes into the insulative package from outside through a crack which has formed in the second insulating material and remains therein in a semiconductor device thus structured, the first insulating material keeps the water from reaching the side surfaces and the peripheral region of the upper surface of each semiconductor chip, thereby preventing the occurrence of a leak current. According to the aforementioned Publication, the structure serves to prevent degradation of the breakdown voltage characteristics due to water existing on the side surfaces and the peripheral region of the upper surface of each semiconductor chip under high-temperature and high-humidity conditions.
Generally, a leak current increases in a conventional semiconductor device even under room temperature conditions when a high voltage is applied across an emitter and a collector and this may develop a device failure like incorrect switching and breakdown due to overcurrent of a semiconductor chip, such an IGBT chip or a diode chip. This kind of leak current is supposed to increase when a negative charge accumulates in a guard ring due to a strong electric field produced between a conductive wire electrically connected to the emitter and the guard ring, resulting in excessive formation of a depletion layer in a multilayer structure of the semiconductor device and allowing the leak current to flow through the depletion layer. Another problem of the conventional semiconductor device is that if a wire which is a source of electric charge is located immediately above a guard ring where the electric field is maximized, the wire continuously supplies the electric charge and the amount of electric charge injected into sealing material increases with time, which could cause an increase in the leak current and eventual malfunctioning of a semiconductor chip. In a case where a silicon carbide (SiC) chip having a higher operating temperature is used instead of a silicon chip, for instance, the electric charge can more easily be injected into sealing material. This also develops a problem that malfunctioning of the semiconductor chip can occur due to an increase in the leak current.